
SD_CLKO MAY BE DELAYED
AND CONNECTING
BY REMOVING 0 OHM RESISTOR
JUMPERS WITH 75 OHM COAX
UNMARKED RESISTORS ARE 30 OHMS
30
SD_CLKI
I228
NA
DS33Z11
10UF
V1_8ZCHIP
V1_8ZCHIP
10UF
10UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
10UF
10UF
10UF
10UF
10UF
0.1UF
10UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
470UF
470UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
10UF
10UF
10UF
Z41TSYNC
SD_RAS
SD_A<11..0>
SD_BA0
SD_BA1
SD_DQM2
SD_DQM1
SD_DQM0
SD_CAS
10
11
9
8
7
6
5
4
3
2
1
0
26
25
23
22
21
18
17
16
15
14
13
12
11
10
9
8
7
5
4
3
2
1
0
31
29
28
27
19
20
6
SD_CS
SD_DQM3
24
SD_DQ<31..0>
Z41RSYNC
0.1UF
0.1UF
NC_PINF9
SD_WE
R187
RB252
RB270
RB272
RB294
RB276
RB275
R220
R221
R222
R188
RB253
R185
RB259
R184
R183
RB258
RB257
RB245
R182
R223
R224
R225
R226
RB297
R227
RB260
R228
R181
R186
RB273
R180
R179
RB271
RB244
R178
R215
R216
R217
RB290
RB289
RB291
RB292
R218
RB256
RB255
RB296
RB274
R219
R189
RB293
RB295
RB278
RB277
RB254
TP46
TP70
TP69
CB428
CB351
CB170
CB136
CB430
CB153
CB129
CB159
CB173
CB249
CB235
CB303
CB226
CB214
CB434
CB213
CB437
CB281
CB244
CB451
CB141
CB186
CB425
CB452
CB413
CB382
CB419
CB418
CB224
CB354
CB175
CB433
CB432
CB183
CB426
CB182
CB252
U18
SD_CLKO
3D2^
3D2^
6/71(TOTAL)
09/16/2004
2/6(BLOCK)
STEVE SCULLY
DS33Z11/41/44DK01A0
@\_ZTOP_LIB\.\_ZTOPDN_\(SCH_1):PAGE1_I5@\_ZTOP_LIB\.\_Z11TOP_DN\(SCH_1):PAGE1_I1@\_ZTOP_LIB\.\_Z11ANDLAN_DN\(SCH_1):PAGE2
111
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
F4
G6
H6
F10
L3
E11
E12
D12
M13
N2
M2
L2
N1
M1
K1
J1
J2
H3
M3
J3
L4
N4
N3
L1
K2
J12
M5
M7
M8
N8
G4
M10
M9
G13
K6
N5
L6
E3
D2
M12
H11
M11
N13
N11
L13
N12
K13
J13
M4
H4
M6
N7
L12
L5
L7
L8
L9
N9
G5
D3
H5
H10
K12
F12
F13
J10
J8
J9
K8
K7
J11
J6
F8
H7
J7
H13
H12
G12
F11
G11
L10
A12
K9
H9
K5
J5
K10
K3
F9
G1
G3
D1
H8
K11
L11
N10
G8
G7
G9
G10
N6
K4
J4
9D5<
10A4< 6B5<
10B4<>
10A4< 6D4<
10B4<>
7C4<
7A3>
7B4<
7B4<
7C4<
7C4<
7C4<
7C4<
7C4<
7C4<
7D7
7C4<
7C3<
PAGE:
DATE:
TITLE:
ENGINEER:
A A
B B
C C
D
D
1
1
2
2
3
3
4
45
56
6
7
7
8
8
PWR/GND
SDRAM CONTROLLER SYSTEM
DS33Z11_U3
4VDD1.8
5VDD1.8
SDMASK<0>
5VDD3.3
4VDD3.3
2VDD3.3
3VDD3.3
SDA<1>
SDA<2>
SDA<3>
9VDD3.3
VSS0
NC3
NC2
NC1
VSS1
VSS2
VSS4
VSS5
10VDD3.3
VSS13
VSS18
SDATA<31>
SDATA<30>
SDATA<29>
SDATA<28>
SDATA<27>
SDATA<26>
VSS8
8VDD3.3
VSS3
VSS6
VSS7
VSS9
VSS11
VSS12
VSS10
VSS14
VSS17
VSS16
VSS15
11VDD3.3
6VDD3.3
0VDD1.8
0VDD3.3
SDA<0>
SDA<6>
SDA<5>
SDA<4>
SDA<7>
12VDD1.8
SBA<1>
SBA<0>
SCAS*
SWE*
SDATA<24>
SDATA<23>
SDATA<22>
SDATA<21>
SDATA<20>
SDATA<19>
SDATA<18>
SDATA<17>
SDATA<16>
1VDD1.8
2VDD1.8
SDCS*
SDCLKO
SRAS*
SYSCLKI
SDMASK<3>
SDMASK<2>
SDMASK<1>
SDA<11>
SDA<10>
SDA<9>
SDA<8>
SDATA<25>
SDATA<14>
SDATA<15>
SDATA<6>
SDATA<5>
SDATA<7>
SDATA<8>
SDATA<9>
SDATA<10>
SDATA<12>
SDATA<11>
SDATA<13>
SDATA<0>
SDATA<2>
SDATA<1>
SDATA<3>
SDATA<4>
11VDD1.8
10VDD1.8
9VDD1.8
8VDD1.8
6VDD1.8
7VDD1.8
7VDD3.3
1VDD3.3
3VDD1.8
V3_3
V3_3
IN
IN
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